Electronic digital logic circuitry – Multifunctional or programmable – Array
Reexamination Certificate
2006-05-30
2006-05-30
Wamsley, Patrick (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
Array
C327S217000
Reexamination Certificate
active
07053652
ABSTRACT:
Static memory cell circuits having a single bit line further include first and second word lines, first and second cross-coupled logic gates, and first and second pass gates. The first pass gate is coupled between the bit line and a first storage node at the output of the first logic gate, and has a gate terminal coupled to the first word line. The second pass gate is coupled between the bit line and a second storage node at the output of the second logic gate, and has a gate terminal coupled to the second word line. The bit line and one of the word lines can be used to selectively set or reset a given static memory cell, if desired, without affecting other memory cells along the word line. In some embodiments, the static memory cell is a configuration memory cell of a programmable logic device (PLD).
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Cartier Lois D.
Wamsley Patrick
Xilinx , Inc.
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