Static memory cell and SRAM device

Details Static memory cell and SRAM device Static memory cell and SRAM device

2006-08-08

2006-08-08

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Systems using particular element

Electrochemical

C365S230060

Reexamination Certificate

active

07088607

ABSTRACT:
The objective of this invention is to provide a static memory cell and an SRAM device that can improve the write margin while preventing degradation of the static noise margin. By turning on/off transistor Qp13,it is possible to control the drop in voltage due to the threshold voltage of transistor Qn15.For example, in read mode, when it is necessary to hold the stored data while setting word line WL to the high level, transistor Qp13is turned off; the drivability of transistor pair Qn11,Qn12is decreased, thereby increasing the static margin. In the case of rewriting the stored data, transistor Qp13is turned on; the drivability of transistor pair Qn11, Qn12is increased, thereby increasing the write margin. As a result, it is possible to improve the performance of both the static noise margin and the write margin.

REFERENCES:
patent: 6414895 (2002-07-01), Kokubo et al.
patent: 6917538 (2005-07-01), Ashizawa

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