Static memory cell and method of manufacturing a static memory c

Details Static memory cell and method of manufacturing a static memory c Static memory cell and method of manufacturing a static memory c

1995-06-21

1997-05-13

Prenty, Mark V.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257903, 257904, 257104, 365182, H01L 2976

Patent

active

056295464

ABSTRACT:
A static memory cell having no more than three transistors. A static memory cell is formed by providing a semiconductor substrate; forming a buried n-type layer in the substrate, the n-type layer having a first average n-type dopant concentration of at least 1.times.10.sup.16 ions/cm.sup.3 ; forming an n-channel transistor relative to the substrate over the buried n-type layer, the n-channel transistor having a source, a gate, and a drain, the source having a second average n-type dopant concentration of at least 1.times.10.sup.19 ions/cm.sup.3 and the drain having a third average n-type dopant concentration of at least 1.times.10.sup.19 ions/cm.sup.3, and the source having a depth deeper than the drain so as to be closer to the buried n-type layer than the drain; and forming a p-type region in junction with the source to define a tunnel diode between the p-type region and the source.

REFERENCES:
patent: 4198644 (1980-04-01), Esaki
patent: 4360897 (1982-11-01), Lehovec
patent: 4396999 (1983-08-01), Malaviya
patent: 5032891 (1991-07-01), Takagi et al.
patent: 5099191 (1992-03-01), Galler et al.
patent: 5225700 (1993-07-01), Smayling
patent: 5321285 (1994-06-01), Lee et al.

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