Static memory cell

Details Static memory cell Static memory cell

1998-08-05

1999-08-17

Nelms, David

Static information storage and retrieval

Systems using particular element

Flip-flop

36518911, G11C 700

Patent

active

059403179

ABSTRACT:
A static memory cell is described which has cross coupled pulldown transistors and dual access transistors. The memory cell is fabricated such that balanced current paths are formed through the two pulldown transistors. A single word line is used to activate the access transistors which couple the memory cell to complementary bit lines. The memory cells, as viewed in a plan view, have the single word line and gates of the pulldown transistors fabricated in parallel.

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