Static logic design for CMOS

Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Field-effect transistor

Reexamination Certificate

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C326S083000, C326S119000

Reexamination Certificate

active

06975143

ABSTRACT:
A static logic circuit with a pull-up network (155) and a pull-down network (160). The network is fabricated on SOI substrates and the pull-up network comprises at least one NMOS transistor (115) and the pull down network comprises at least one PMOS transistor (120).

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patent: 6268750 (2001-07-01), Esch, Jr.

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