Static logic circuit with improved output signal levels

Details Static logic circuit with improved output signal levels Static logic circuit with improved output signal levels

1994-12-16

1996-08-13

Westin, Edward P.

Electronic digital logic circuitry

Interface

Current driving

326121, H03K 190175, H03K 19094

Patent

active

055460224

ABSTRACT:
A static logic circuit with improved output signal levels includes a static complementary MOSFET circuit with a signal node and pull-up and pull-down amplifiers, each with at least one biasing circuit, connected thereto. The pull-up and pull-down amplifiers are connected to VDD and VSS, respectively, and receive one or more logic signals (e.g. one for an inverter and more for logic gates such as AND, OR, etc.) and one or more bias signals and in accordance therewith provide pull-up and pull-down voltages, respectively, to the signal node. In accordance with the applied pull-up or pull-down voltage, the signal node charges to a charge state with an associated node voltage approximately equal to VDD or VSS, respectively. Each biasing circuit receives the same input logic signal as its associated pull-up or pull-down amplifier and provides thereto a bias signal approximately equal to VSS or VDD, respectively. In accordance with its input logic signal, each pull-up or pull-down amplifier together with its associated biasing circuit provides either an active current path between the signal node and VDD or VSS for applying the desired pull-up or pull-down voltage, respectively, or a leakage current path between VDD and VSS for preventing the application of an undesired pull-down or pull-up voltage during application of the desired pull-up or pull-down voltage, respectively.

REFERENCES:
patent: 4963766 (1990-10-01), Lundberg
patent: 5175445 (1992-12-01), Kinugasa et al.
patent: 5389834 (1995-02-01), Kinugasa et al.
patent: 5391939 (1995-02-01), Nonaka
Neil H. E. Weste and Kamran Eshraghian, "Principles of CMOS VLSI Design, A Systems Perspective", Second Edition, Addison-Wesley Publishing Company, 1993, pp. 298-302 and 308-311.
Saburo Muroga, "VLSI System Design, When and How to Design Very-Large-Scale Integrated Circuits", John Wiley & Sons, 1982, pp. 221-224.
Yasuhiko Tsukikawa, Takeshi Kajimoto, Yasuhiko Okasaka, Yoshikazu Morooka, Kiyohiro Furutani, Hiroshi Miyamoto and Hideyuki Ozaki, "An Efficient Back-Bias Generator with Hybrid Pumping Circuit for 1.5-V DRAM's", IEEE Journal of Solid-State Circuits, vol. 29, No. 4, Apr. 1994, pp. 534-538.
Ingemar Karlsson, "True Single Phase Clock Dynamic CMOS Circuit Technique", 1988 IEEE, pp. 475-478.
Yuan Ji-Ren, Ingemar Karlsson and Christer Svensson, "A True Single-Phase-Clock Dynamic CMOS Circuit Technique", IEEE Journal of Solid-State Circuits vol. SC-22, No. 5, Oct. 1987, pp. 899-901.
Jiren Yuan, Christer Svensson, "High-Speed CMOS Circuit Technique", IEEE Journal of Solid-State Circuits, vol. 24, No. 1, Feb. 1989, p. 62.
Takeshi Sakata, Kiyoo Itoh, Masashi Horiguchi and Masakazu Aoki, "Two-Dimensional Power-Line Selection Scheme for Low Subthreshold-Current Multi-Gigabit DRAM's ", IEEE Journal of Solid-State Circuits, vol. 29, No. 8, Aug. 1994, pp. 887-894.
Takeshi Sakata, Kiyoo Itoh, Masashi Horiguchi and Masakazu Aoki, "Subthreshold-Current Reduction Circuits for Multi-Gigabit DRAM's ", IEEE Journal of Solid-State Circuits, vol. 29, No. 7, Jul. 1994, pp. 761-771.
Takayuki Kawahara, Masashi Horiguchi, Yoshiki Kawajiri, Goro Kitsukawa, Tokuo Kure and Masakazu Aoki, "Subthreshold Current Reduction for Decoded-Driver by Self-Reverse Biasing", IEEE Journal of Solid-State Circuits, vol. 28, No. 11, Nov. 1993, pp. 1136-1144.

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