Static-dynamic-dynamic repeater circuit

Details Static-dynamic-dynamic repeater circuit Static-dynamic-dynamic repeater circuit

2011-08-23

2011-08-23

Laxton, Gary L (Department: 2838)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

C326S057000, C326S082000

Reexamination Certificate

active

08004307

ABSTRACT:
A repeater circuit. The repeater circuit includes two input circuits, two intermediate circuits, and two output circuits. Responsive to a transition of an input signal from one logic level to another level, one of the input circuits is activated. The corresponding intermediate circuit is activated corresponding to activation one of the input circuits, and in turn, the corresponding output circuit is activated, which then drives an output signal on an output node. After a delay, a feedback signal conveyed via a feedback path deactivates the corresponding intermediate circuit and the corresponding output circuit. After deactivation of the corresponding output circuit, a keeper circuit continues to provide the output signal on the output node. The other one of the two input circuits inhibits activation of the other one of the intermediate circuit responsive to the transition, which results in the other output circuit also being inhibited from activation.

REFERENCES:
patent: 6426652 (2002-07-01), Greenhill et al.
patent: 7071747 (2006-07-01), Masleid
patent: 7119580 (2006-10-01), Masleid et al.
patent: 7256634 (2007-08-01), Masleid
patent: 7592839 (2009-09-01), Masleid et al.
patent: 7595664 (2009-09-01), Masleid et al.

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