Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output command process
Patent
1998-06-19
2000-07-04
Lee, Thomas C.
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output command process
710 14, 710 36, 710 52, 711 5, 712128, 370390, G06F 1300, G06F 900, G06F 1500
Patent
active
060852585
ABSTRACT:
A multiple-register-access-capable device includes a serial port coupled to a plurality of registers. The multiple-register-access-capable device is controlled by a state machine. Information in one of the registers identifies whether the device is in a single-register or multiple-register mode. The state machine which controls the device operates in a single-register mode if the bit is disabled and operates in a multiple-register mode if the bit is enabled. In single-register mode, the device operates in a manner known in the prior art whereby a single register is identified for reading or writing and data is then either written into the register or read out from the register in response to a write or read request. In multiple register mode, data is written into or read out from all registers in a selected group of registers in the device in response to the write or read request. When the device of the present invention is in multiple-register access mode, a read or write operation addressed to a selected register is interpreted as a request to read or write from all registers in a defined group of registers and the state machine directs the operation of the device to accomplish a read from or write to all of the registers in the group. When the device is in single-register mode, operations addressed to the selected register cause normal read or write operation to be executed with respect to that register.
REFERENCES:
patent: 5966731 (1999-10-01), Barth et al.
patent: 6021477 (2000-02-01), Mann
Dreyer Stephen F.
Hu Rong-Hui
Lee Thomas C.
LSI Logic Corporation
Nguyen Thah
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