State machine and system and method of implementing a state...

Electronic digital logic circuitry – Multifunctional or programmable – Sequential or with flip-flop

Reexamination Certificate

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Reexamination Certificate

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07605607

ABSTRACT:
A system and method for implementing a state machine including a plurality of states, the state machine configured to transition from a present state to a next state in response to input. One embodiment of the system includes a plurality of state elements, each of the plurality of state elements representing one of the plurality of states of the state machine, each of the plurality of state elements receiving an on signal, an off signal, and a synchronizing signal, each of the state elements outputting a state value, each of the plurality of state elements further including a logic element to store a temporary state value, wherein the state value is updated by the temporary state value in response to the synchronizing signal, and wherein the state value of each of the plurality of state elements is synchronously updated in response to the synchronizing signal.

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Written Opinion issued by PCT on Nov. 15, 2007 in connection with corresponding PCT International Application No. PCT/CN2007/002328. 5 pages.
International Search Report CS/05/0123 dated Oct. 21, 2005 (Australian Patent Office).

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