Start up circuit for delay locked loop

Details Start up circuit for delay locked loop Start up circuit for delay locked loop

2008-12-02

2010-02-02

Bayard, Emmanuel (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S374000, C375S375000

Reexamination Certificate

active

07656988

ABSTRACT:
An initialization circuit in a delay locked loop ensures that after power up or other reset clock edges are received by a phase detector in the appropriate order for proper operation. After reset of the delay locked loop, the initialization circuit assures that at least one edge of a reference clock is received prior to enabling the phase detector to increase (or decrease) the delay in a delay line. After at least one edge of a feedback clock is received, the initialization circuit enables the phase detector to decrease (or increase) the delay in a delay line.

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