Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1997-08-22
1999-11-02
Beausoliel, Jr., Robert W.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
714 13, 714 6, G06F 1214
Patent
active
059789328
ABSTRACT:
A standby redundancy system comprising a control CPU unit for controlling controlled machines and a standby CPU unit capable of controlling the controlled machines instead of the control CPU unit, characterized by tracking unit for temporarily storing a command consisting of a statement and data entered from a peripheral machine, processing the data based on the statement in the command, and transferring the temporarily stored command to the associated CPU unit.
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Nishiyuki Hiroshi
Sakamoto Noboru
Beausoliel, Jr. Robert W.
Mamdan Wasseem
Mitsubishi Denki & Kabushiki Kaisha
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