Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output command process
Reexamination Certificate
2003-07-28
2009-02-24
Peyton, Tammara (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output command process
C710S008000, C710S009000, C710S010000, C710S019000, C710S033000, C713S001000, C713S002000, C713S189000, C370S447000, C370S474000
Reexamination Certificate
active
07496691
ABSTRACT:
A method and circuit for enhancing the performance in a serial ATA interface uses a standard ATA queue automation circuitry that handles all the transmit/receive frame information structure (FIS) operations for ATA queue commands without interrupting the higher-level software and associated hardware, firmware, and drivers. If the standard ATA queue automation circuitry and command queues are not provided, then every FIS operation will interrupt the higher layer application program. The standard ATA queuing automation circuit preprocesses higher layer commands to write into the task file registers before initiating the transport layer for an FIS transmission and provides information regarding the success or failure of a command. Commands to be executed and completion command queues are preferably used to improve the performance further. These queues may be implemented within the higher layers, as part of the standard ATA queuing automation circuit, or as software, firmware, and/or hardware functionally located between the standard ATA queuing automation circuit and the higher layers. The standard ATA queue automation circuitry provides information to program the DMA controller and activates the DMA automatically for the data transfer.
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Maxtor—Serial Attached SCSI Architecture: Part 4—the Transport Layer. Oct. 2003—6 page.
Ayyavu Vetrivel
Day Brian A.
Viswanathan Ganesan
LSI Corporation
Peyton Tammara
Suiter Swantz PC LLO
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