Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing
Reexamination Certificate
1998-06-01
2001-01-30
Lee, Thomas C. (Department: 2782)
Electrical computers and digital data processing systems: input/
Input/output data processing
Direct memory accessing
C710S037000, C710S220000, C455S003010, C455S012100
Reexamination Certificate
active
06182165
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to microcontrollers, and more specifically to a microcontroller having an improved buffer descriptor ring DMA unit.
2. Description of the Related Art
Specialized microcontrollers with integrated communication features are becoming particularly attractive for communications applications. A microcontroller, or an embedded controller, is uniquely suited to combining functionality onto one monolithic semiconductor substrate (i.e. chip). By embedding various communication features within a single chip, a communications microcontroller may support a wide range of communication applications.
Microcontrollers have been used for many years in many applications. A number of these applications involve communications over electronic networks, such as telephone lines, computer networks, and local and wide area networks, in both digital and analog formats. In communications applications, a microcontroller generally has a number of integrated communications peripherals in addition to the execution unit. These can be low and high speed serial ports, as well as more sophisticated communications peripherals, such as a universal serial bus (USB) interface, and high level data link control (HDLC) channels.
Further, microcontrollers that are employed in communications applications typically include secondary peripherals that remove some of the burden of transferring data from the execution unit. For example, a direct memory access (DMA) controller can directly transfer data from memory to a communications port, and vice versa, with minimal processor intervention.
One such type of direct memory access controller is a buffer descriptor ring DMA controller. A circular buffer DMA controller is a DMA controller that allows for the transfer of data from a circular buffer in memory. A buffer descriptor ring DMA controller takes this concept a step further, providing a ring in memory of buffer descriptors, as opposed to simply a circular buffer itself. That is, a ring is maintained in memory of pointers to and control variables for buffers, also located in memory, which actually contain the data to be transferred. Buffer descriptor ring DMA is especially useful in communications applications that employ “packetized” data, such as network communications and ISDN and T1 data communications applications. Buffer descriptor ring DMA has been previously implemented. One example of such an implementation is the Am79C90C-LANCE (Local Area Network Controller for Ethernet) device by Advanced Micro Devices, Inc., of Sunnyvale, Calif. Using buffer descriptor ring DMA, software executed by the microcontroller can compose packets of data for transmission over a packet style communications network, and then commission the buffer descriptor ring DMA unit to send streams of packets with little or no processor intervention.
SUMMARY OF THE INVENTION
As part of a buffer descriptor ring DMA system, buffers, through their corresponding buffer descriptors, are either owned by software or by the DMA unit. Once the software is ready to relinquish control of the buffer to the DMA channel, it sets an ownership flag within the buffer descriptor, at which point the DMA channel then can transmit data using the buffer.
When the DMA unit needs the buffer, however, and the software owns it, the DMA unit periodically polls the ownership flag within the buffer descriptor until the software relinquishes ownership to the DMA unit by setting the ownership flag. When multiple channels are being polled, interrupt latency can be adversely affected due to a number of buffer descriptors being contiguously polled. Even more detrimental to interrupt latency is if multiple DMA transfers are simultaneously started. If they overlap, they can consume all available bus and memory bandwidth, thus preventing interrupts from being processed for an inordinate period. According to the invention, this is alleviated by distributing the polls of the buffer descriptors throughout a cycle of buffer descriptor polling. That is, the polling of ownership of buffer descriptors associated with multiple channels are evenly spread through the cycle, rather than being done all at once. This reduces interrupt latency because multiple buffer descriptors are not polled one after the other. Further, when two buffer descriptors' ownership are transferred to the DMA unit during the same polling cycle, this happens at different times during the polling cycle rather than simultaneously. This reduces overlap in DMA, both reducing interrupt latency and bandwidth consumption by the DMA unit.
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Motorola's MC68302 Integrated Multi-protocol Processor Fact Sheet, Motorola Corporation, ©1998.
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MC68302 Integrated Multiprotocol Processor User's Manual, Motorola Corporation, ©1995.
Advanced Micro Devices , Inc.
Akin Gump Strauss Hauer & Feld & LLP
Elamin Abdelmoniem
Lee Thomas C.
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