Staggered land pad pattern on substrate for tab interconnection

Details Staggered land pad pattern on substrate for tab interconnection Staggered land pad pattern on substrate for tab interconnection

1994-12-29

1997-02-18

Ledynh, Bot L.

Electricity: conductors and insulators

Boxes and housings

Hermetic sealed envelope type

361772, 361774, 361777, 361813, 257668, H01L 2302, H01R 900

Patent

active

056043309

ABSTRACT:
A package for a semiconductor device. The device is packaged using tape-automated bonding (TAB) to bond an integrated circuit chip to a package substrate of any type. The land pads on the substrate are staggered such that they are arranged in two rows with adjacent pads alternating. In this way, the effective overall pitch of the land pads is smaller than that of each row.

REFERENCES:
patent: 4843191 (1989-06-01), Thomas
patent: 4979289 (1990-12-01), Dunaway et al.
patent: 5155065 (1992-10-01), Schweiss
patent: 5253415 (1993-10-01), Dennis

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