Staged CMOS output buffer

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307451, 307594, H03K 1716

Patent

active

053550293

ABSTRACT:
A staged CMOS output buffer has multiple output transistors connected in parallel and driven by corresponding predrivers. Each predriver has a first input from which an inactive output transistor can be turned on, and a second input from which the other, active output transistor can be turned off. The input to the output buffer is coupled directly to the second input of both predrivers to turn the output transistors off when switching begins, and a resistor-capacitor (RC) circuit is inserted between the first inputs to stagger the predriver turn-on times to reduce the peak and slope of the switching current. The predriver employs chains of pass transistors to achieve both tri-state functionality and the simultaneous turn-off necessary for the staged configuration. A split termination is also employed to reduce switching current, especially NMOS-PMOS crossover current.

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