Stacking type semiconductor chip package

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

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Details

257692, 257777, H01L 2302

Patent

active

060877189

ABSTRACT:
A stacked-type semiconductor chip package of a lead on chip structure which is modified for stacking chips in the package, including a plurality of leads each having an inner lead portion and an outer lead portion extending from the inner lead portion, a lower semiconductor chip having a plurality of center pads and disposed under the inner lead portion, an upper semiconductor chip having a plurality of side pads and disposed above the inner lead portions, a plurality of side adhesive insulating members inserted between the inner lead portions and each of the upper and lower semiconductor chips, a plurality of wires which provide electrical connection between the pads and the inner lead portions, and a molding body which seals the structure other than the outer lead portions.

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