Stacking series of non-power-of-two frame buffers in a...

Details Stacking series of non-power-of-two frame buffers in a... Stacking series of non-power-of-two frame buffers in a...

2008-07-22

2008-07-22

Wu, Xiao M. (Department: 2628)

Computer graphics processing and selective visual display system

Computer graphics display memory system

Memory partitioning

C345S543000, C711S170000, C711S171000, C711S172000, C711S173000

Reexamination Certificate

active

11179221

ABSTRACT:
Storing frames of data in frame buffers sized to match the frame size when the frame size is not a power-of-two number of bytes is disclosed. The buffer size is chosen to be the largest power-of-two that is less than the frame size. When a frame of data is to be stored, the buffer number of a free buffer is effectively multiplied by the buffer size to obtain a partial frame buffer address Q. The buffer size subtracted from the frame size is referred to as a residual buffer size, and the buffer number is effectively multiplied by the residual buffer size to obtain a residual frame buffer address R. The full frame buffer starting address S=Q+R. For implementations where the difference between the frame size and the buffer size is a power-of-two value, binary shifts and addition can be used instead of a multiplier.

REFERENCES:
patent: 2006/0075203 (2006-04-01), Dutta

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