Stacked semiconductor memory

Details Stacked semiconductor memory Stacked semiconductor memory

1984-12-13

1986-12-30

Fears, Terrell W.

Static information storage and retrieval

Format or disposition of elements

365182, 365187, 307304, 357 237, G11C 1140

Patent

active

046334386

ABSTRACT:
In a 3-transistor random access memory for dynamic operation, the invention discloses a structure in which one of the transistors is stacked on the other transistor. A transistor for writing is disposed on a transistor for reading, and one of its terminals is used in common with the gate electrode of a transistor for judging data. The other terminal is connected to one of the terminals of the transistor for reading.
A memory cell capable of extremely large scale integration can be obtained.

REFERENCES:
patent: 4084108 (1978-04-01), Fujimoto
Abbott et al., "A 4K MOS Dynamic Random-Access Memory", IEEE Journal of Solid-State Circuits, vol. SC-8, No. 5, Oct. 1973, pp. 292-298.

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