Stacked semiconductor device assembly and method for forming

Semiconductor device manufacturing: process – With measuring or testing – Electrical characteristic sensed

Reexamination Certificate

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C257SE21524

Reexamination Certificate

active

07132303

ABSTRACT:
One embodiment relates to using a robust metal layer of a semiconductor device to form landing pads. In one embodiment, a sputterable, nonwettable refractory metal is used as a solder mask for the landing pads. A second device may then be coupled to the robust metal layer landing pads of the semiconductor device. In one embodiment, the landing pads are formed while the semiconductor device is in wafer form, and a second device is then coupled to the landing pads of each of the plurality of semiconductor devices within the wafer, such that each semiconductor device within the wafer is electrically coupled to a second device. In this manner, each semiconductor device within the wafer and its corresponding second device may be probed and tested as a system. After probing and testing, the wafer may be singulated into a plurality of individual device assemblies which may then be packaged.

REFERENCES:
patent: 4104111 (1978-08-01), Mack
patent: 5258648 (1993-11-01), Lin
patent: 5291061 (1994-03-01), Ball
patent: 5739588 (1998-04-01), Ishida et al.
patent: 6165815 (2000-12-01), Ball
patent: 6177731 (2001-01-01), Ishida et al.
patent: 6212767 (2001-04-01), Tandy
patent: 6222265 (2001-04-01), Akram et al.
patent: 6229158 (2001-05-01), Minemier et al.
patent: 6337225 (2002-01-01), Foong et al.
patent: 6344401 (2002-02-01), Lam
patent: 6429046 (2002-08-01), Marlin
patent: 6494361 (2002-12-01), Scanlan et al.
patent: 6534853 (2003-03-01), Liu et al.
Woerner, Holger; “Potential of Flip Chip Technologies for Chip Stacking Applications”;. SMTA Conference, Sep. 2002; 6pp.
Edwards, Chris; “Solid Stackng Technique Removes Pinout Requirement”; EETimes (http://www.eet.com/story/OEG20020812S0004); Aug. 12, 2002; 3pp; EETimes.
Olsen, Dennis et al.: “Assembly of Silicon-on-Silicon Flip Chip Pairs in Conventional Semiconductor Packages”; Motorola Physical Electronics & Packaging Lab Technical Report No. PEPL 91-6; Jun. 17 1991.

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