Stacked semiconductor device and method of manufacturing the...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip

Reexamination Certificate

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Details

C257S686000, C257S685000, C257S723000

Reexamination Certificate

active

08039970

ABSTRACT:
A stacked semiconductor device includes a first semiconductor element mounted on a circuit substrate and a second semiconductor element stacked on the first semiconductor element via a spacer layer. An electrode pad of the first semiconductor element is electrically connected to a connection portion of the circuit substrate through a first metal wire. A vicinity of the end portion of the first metal wire connected to the electrode pad is in contact with an insulating protection film which covers the surface of the first semiconductor element.

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Office Action issued on Jan. 25, 2011 in Japanese Patent Application No. 2007-021060 (with English Translation).
Japanese Office Action issued May 17, 2011, in Patent Application No. 2007-021060 (English-language translation only).

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