Stacked semiconductor device

Details Stacked semiconductor device Stacked semiconductor device

2007-11-20

2007-11-20

Ngô, Ngân V. (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

For plural devices

C257S723000, C257S725000, C257SE23003

Reexamination Certificate

active

10995140

ABSTRACT:
A first semiconductor element and second semiconductor element are bonded via die-bonding material. A first electrode of the first semiconductor element and a third electrode are joined, by means of flip-chip bonding, to a semiconductor carrier that has the third electrode on the one face of the semiconductor carrier and a fourth electrode on the perimeter of the other face of the semiconductor carrier. The bonding pad of the second semiconductor element and the fourth electrode of the semiconductor carrier are connected via fine metal wire by means of wire bonding. The periphery of the first semiconductor element and the wiring portion of the fine metal wire are filled with insulating sealing resin between the semiconductor carrier and second semiconductor element and the sealing fill region for the sealing resin is formed substantially the same as the external dimensions of the second semiconductor element.

REFERENCES:
patent: 05-275578 (1993-10-01), None
patent: 10-084076 (1998-03-01), None
patent: 2000-243875 (2000-09-01), None
patent: 2001-320013 (2001-11-01), None
patent: 2002-110851 (2002-04-01), None
patent: 2002-270763 (2002-09-01), None
patent: 2003-347505 (2003-12-01), None

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