Stacked package integrated circuit

Details Stacked package integrated circuit Stacked package integrated circuit

2007-09-04

2007-09-04

Clark, Jasmine (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S685000, C257S777000, C257SE25006, C257SE25013, C257SE25027, C257SE23085, C438S109000

Reexamination Certificate

active

11086982

ABSTRACT:
The invention relates to an integrated circuit, electronic device, and method for assembling an integrated circuit package with at least one bottom module with a stacked die package comprising at least two dies within one single mold cap. To allow chip area reduction, the invention provides at least one memory module stacked on top of the bottom module using a ball grid array.

REFERENCES:
patent: 6982488 (2006-01-01), Shin et al.
patent: 2004/0113253 (2004-06-01), Karnezos
patent: 2005/0121764 (2005-06-01), Mallik et al.
patent: 2006/0035409 (2006-02-01), Suh et al.
patent: 2006/0108676 (2006-05-01), Punzalan et al.
patent: 2006/0175696 (2006-08-01), Kim

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