Stacked package for electronic elements and packaging method...

Details Stacked package for electronic elements and packaging method... Stacked package for electronic elements and packaging method...

2006-08-15

2006-08-15

Vu, Hung (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S698000, C257S733000, C257S735000, C257S737000, C257S773000

Reexamination Certificate

active

07091592

ABSTRACT:
A stacked package for electronic elements is provided, a plurality of stud bumps are formed on a substrate by means of a stud bump process to align with a plurality of vias of one provided electronic element. The stud bumps respectively pass through the vias and electrically connect the electronic element. Furthermore, additional electronic elements are stacked on the carrier according to a similar way to form a stacked electronic package.

REFERENCES:
patent: 6297548 (2001-10-01), Moden et al.
patent: 6577013 (2003-06-01), Glenn et al.
patent: 2002/0036338 (2002-03-01), Matsuo et al.

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