Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices
Reexamination Certificate
1998-12-28
2001-10-30
Potter, Roy (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
For plural devices
C257S701000
Reexamination Certificate
active
06310392
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to multi-package integrated circuit modules. In particular, this invention relates to Dual In-line Memory Modules (DIMM), comprised of Ball-Grid-Array (BGA) or other near chips scale or chip scale packages, that have increased density, enhanced reliability, and precision impedance control for high speed memory applications. The DIMM module physical size and the system interface conform to one of two specifications for 168 pin, 8-byte wide DIMMs; the first generation buffered DRAM DIMM, and the second generation unbuffered DRAM DIMM
DIMMs based on RAMBUS™ technology are capable of data transfer rates up to 800 Mhz using low voltage swings of 800 mv. Data is transferred across a 16-bit bus on both edges of a 400 Mhz-clock signal. The high-speed operation of a RAMBUS CHANNEL™ requires dense packaging and high quality transmission lines. The RAMBUS CHANNEL™ high-speed signals require matched transmission lines that have the identical propagation characteristics and travel across a uniform, parallel layout. These high-speed signals require a uniform matched impedance of 25 to 65 ohms over the entire length of each signal-transmission line after all components are installed. Multiple DRAM components that are electrically coupled to a single data transmission line present periodically spaced capacitive loads, which significantly effect the impedance of a portion of the transmission line. The periodic spacing between these capacitive loads on the transmission line is referred to as pitch. Decreasing the pitch has the effect of decreasing the impedance of the transmission line as a whole. Other parameters which effect the impedance of a signal transmission line are the properties and thickness of the material located between the line and either an adjacent ground plane, ground line, or signal line. Increasing the dielectric thickness or decreasing the signal line width has the effect of increasing the impedance of the effected portion of the transmission line. RAMBUS™ layout guidelines require the high-speed channel signals to be routed on a single signal layer with no vias, and with data signals routed in parallel with clock signals. Vias typically have a physical shape that creates a capacitance effect in the order of 1 pF; for this reason, the RAMBUS CHANNEL™ guidelines state that vias are not allowed on high-speed transmission lines. These guidelines allow for 20% variation in dielectric thickness, signal line trace widths, and copper thickness. Signal line trace length among the 13 high-speed signals can vary by 100 mils (2.5 mm). Deviations from the guidelines that maintain the desired transmission line characteristics are acceptable.
Ball-Grid-Array (BGA) Integrated circuit packages typically have leads that extend from the bottom surface of a rectangular solid casing in a two-dimensional grid pattern. Package leads provide electrical and thermal coupling to one or more integrated circuit dies that are embedded within the protective casing. The external portion of each lead has a relatively large ball of solder. Typically, the protective casing completely surrounds the embedded die, but in some BGA packages, the protective casing does not cover the inactive top surface of the die. Near-chip scale packages provide 1.0 mm center-to-center lead spacing. Chip-scale packaging, having 0.5 mm center-to-center lead spacing, offers excellent electrical characteristics including low capacitance and thermal design.
Prior methods of manufacturing memory modules unnecessarily limit the number of integrated packages that can be placed on a standard DIMM module while maintaining electrical characteristics required for the high-speed transmission-lines of RAMBUS CHANNEL™.
Known methods for manufacturing multi-package modules, typically have signal transmission lines with inconsistent impedance in portions as well as structures and multiple-dissimilar materials comprising a single transmission line that can cause reflections of propagating high-speed signal transitions, such as the data transfers that occur each 1.25 nanosecond period on a RAMBUS CHANNEL™. These reflections compromise the integrity of the system by increasing the settling time of the signal. This settling time is commonly referred to as ringing. Ringing is high frequency signal oscillation, typically in the 100 MHZ to 1 GHz range, that can occur when signals quickly transition from one voltage level to another as a result of reflections. This ringing can create cross talk. Crosstalk is undesired noise added to a signal resulting from a magnetic field radiated from adjacent signals. Ringing also increases the overall electromagnetic radiation from the system. When ringing couples over as noise to power input signals or increases ground bounce it will slow the response from the high-speed devices such as memory. More precise control of the impedance of the transmission lines is necessary to reduce ringing.
SUMMARY OF THE INVENTION
The methods and apparatus of the present invention enable the economical manufacture of multi-package modules comprised of chip-scale packages, and provide enhanced thermal characteristics, while maintaining high-quality transmission lines required for RAMBUS CHANNEL™. Integrated circuit modules, made in accordance with the methods of the present invention, include multiple chip scale packages mounted to a support substrate. Each package is inclined at an angle to the support substrate and partially overlaps another package. The first package or row of packages may be supported by a wedge structure on the support substrate to establish the angle of inclination of the packages. A flexible substrate or flex circuit is mounted to the bottom surface of each package and has a portion that extends away from the mounted integrated circuit packages to adhere to the support substrate. It will be apparent to those skilled in the art of integrated package manufacturing that the methods and apparatus described herein are applicable to a broad range of modules comprised of multiple integrated circuit packages.
One embodiment of the present invention has chip scale packages mounted to the upper surface of a flexible substrate. Package lead pads formed in the flexible substrate electrically couple to select package leads. A portion of each flexible substrate extends away from the integrated packages and includes circuit interconnect pads located on the lower surface for electrical and thermal coupling to corresponding interconnect pads on the support substrate. Another embodiment of a flexible substrate of the present invention, has the extended portion folded back, at a 180° angle to itself, allowing circuit interconnect pads on the upper surface of the flexible substrate to couple with corresponding interconnect pads on the support substrate.
An alternative embodiment provides two chip scale packages mounted to opposite sides of two adjacent flexible substrates, each of which is coupled to a different one of the package's leads. The extended portion of each flexible substrate attaches to the support substrate.
Different specific aspects of the present invention can be used singularly or in combination with other methods of the present invention for precision control of the impedance in each portion of select transmission signal lines formed in the flexible substrate. One method utilizes one or more electrical ground (GND) traces that are located in close proximity and parallel to a substantial portion of the signal trace. Another method has a ground (GND) plane layer separated from the signal layer by a dielectric layer. One method arranges interconnect pads, which couple signal lines on the flexible substrate to signal lines on the support substrate, such that interconnect pads that are to carry high speed signals are located adjacent to interconnect pads that are designated to be coupled to GND.
Different preferred embodiments are described herein for the package lead mounting pads, or receptacles, formed in the flexible substrate, for coupling select package
Denko J. Scott
George & Donaldson, L.L.P.
Potter Roy
Staktek Group L.P.
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