Stacked memory, memory module and memory system

Details Stacked memory, memory module and memory system Stacked memory, memory module and memory system

2006-09-05

2006-09-05

Dinh, Son T. (Department: 2824)

Static information storage and retrieval

Format or disposition of elements

C257S777000, C257S686000

Reexamination Certificate

active

07102905

ABSTRACT:
A point-to-point bus and a daisy chain bus are provided for supplying signals to stacked memories, and the stacked memories are mounted mutually apart by a distance equivalent to the length of the stacked memory on both surfaces of a module substrate. Furthermore, the memory chips arranged in a stacked memory mounted on one surface are set in an active state at the same time alternately with the memory chips arranged in a stacked memory mounted on another surface of the module substrate.

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patent: 6713854 (2004-03-01), Kledzik et al.
patent: H06-291250 (1994-10-01), None
patent: H07-202120 (1995-08-01), None
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patent: 2001-027987 (2001-01-01), None

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