Stacked memory cell having diffusion barriers

Details Stacked memory cell having diffusion barriers Stacked memory cell having diffusion barriers

2003-01-22

2004-06-01

Tsai, H. Jey (Department: 2812)

Semiconductor device manufacturing: process

Having magnetic or ferroelectric component

C438S240000

Reexamination Certificate

active

06743643

ABSTRACT:

FIELD OF THE INVENTION
The invention relates in general to the structure and fabrication of integrated circuits and more particularly to an integrated circuit providing effective protection of selected circuit components, such as transistors and ferroelectric materials, against diffusion of oxygen and hydrogen.
BACKGROUND OF THE INVENTION
Ferroelectric compounds possess favorable characteristics for use in nonvolatile integrated circuit memories. See U.S. Pat. No. 5,046,043 issued Sep. 3, 1991 to Miller et al. A ferroelectric device, such as a capacitor, is useful as a nonvolatile memory when it possesses desired electronic characteristics, such as high residual polarization, good coercive field, high fatigue resistance, and low leakage current. Lead-containing ABO
3
-type ferroelectric oxides such as PZT (lead zirconium titanate) and PLZT (lead lanthanum zirconium titanate) have been studied for practical use in integrated circuits. Layered superlattice material oxides have also been studied for use in integrated circuits. See U.S. Pat. No. 5,434,102 issued Jul. 18, 1995 to Watanabe et al. Layered superlattice materials exhibit characteristics in ferroelectric memories that generally are superior to those of PZT and PLZT compounds. Integrated circuit devices containing ferroelectric elements are currently being manufactured. Nevertheless, problems associated with oxygen degradation and hydrogen degradation during the manufacturing process hinders the economical production in commercial quantities of ferroelectric memories and other IC devices using either the ABO
3
-type oxides or the layered superlattice material compounds with the desired electronic characteristics.
A typical memory in an integrated circuit contains a semiconductor substrate and a metal-oxide semiconductor field-effect transistor (MOSFET) electrically connected to a capacitor device. Layered superlattice materials and other dielectric capacitor materials currently in use and development comprise metal oxides. In conventional fabrication methods, crystallization of the metal oxides to produce desired electronic properties requires heat treatments in oxygen-containing gas at elevated temperatures. The heating in the presence of oxygen is typically performed at a temperature in a range of 500° C. to 900° C. for 60 minutes to three hours. As a result of the presence of reactive oxygen at elevated temperatures, numerous defects, such as dangling bonds, are generated in the single crystal structure of the semiconductor silicon substrate, leading to deterioration in the electronic characteristics of the MOSFET. Good ferroelectric properties have been achieved in the prior art using process heating temperatures at about 700° C. to crystallize layered superlattice material. See U.S. Pat. No. 5,508,226 issued Apr. 16, 1996 to Ito et al. Nevertheless, the long exposure times for up to several hours in oxygen, even at the somewhat reduced temperature ranges, results in oxygen damage to the semiconductor substrate and other elements of a CMOS circuit.
After completion of the integrated circuit, the presence of oxides may still cause problems because oxygen atoms from a thin film of metal oxide capacitor dielectric, for example, from ferroelectric layered superlattice material, tend to diffuse through the various materials contained in the integrated circuit and combine with atoms in the integrated circuit substrate and in semiconductor layers forming undesired oxides. The resulting oxides interfere with the function of the integrated circuit; for example, they may act as dielectrics in the semiconducting regions, thereby forming virtual capacitors.
Diffusion of atoms from the underlying semiconductor substrate and other circuit layers into the ferroelectric metal oxide (or other dielectric metal oxide) is also a problem; for example, silicon from a silicon substrate and from polycrystalline silicon contact layers is known to diffuse into layered superlattice material and degrade its ferroelectric properties. For relatively low-density applications, the ferroelectric memory capacitor is placed on the side of the underlying CMOS circuit, and this may reduce somewhat the problem of undesirable diffusion of atoms between circuit elements. Nevertheless, as the market demand and the technological ability to manufacture high-density circuits increase, the distance between circuit elements decreases, and the problem of molecular and atomic diffusion between elements becomes more acute. To achieve high circuit density by reducing circuit area, the capacitor of a memory cell is placed virtually on top of the switch element, typically a field-effect transistor (“MOSFET”), and the switch and bottom electrode of the capacitor are electrically connected by an electrically conductive plug. To inhibit undesired oxygen diffusion, a barrier layer is sometimes disposed under the ferroelectric or other dielectric oxide, between the capacitor's bottom electrode and the underlying layers. The barrier layer must inhibit the diffusion of oxygen and other chemical species that may cause problems; it must also be electrically conductive, to enable electrical connection between the capacitor and the switch. Such barrier layers are typically limited in size to cover only the surface area of an integrated circuit substrate located approximately directly below the capacitor.
To restore the silicon properties of the MOSFET/CMOS, the manufacturing process typically includes a forming-gas, or hydrogen, annealing (“FGA”) process, in which defects such as dangling bonds-are eliminated by utilizing the reducing property of hydrogen. Various techniques have been developed to effect the hydrogen annealing, such as H
2
-gas heat treatment in ambient conditions. Conventionally, hydrogen treatments are conducted between 350° C. and 550° C., typically around 400° C. to 450° C. for a time period of about 30 minutes. In addition, the CMOS/MOSFET manufacturing process requires other fabrication processes that expose the integrated circuit to hydrogen, often at elevated temperatures, such as hydrogen-rich plasma CVD processes for depositing metals and dielectrics, growth of silicon dioxide from silane or TEOS sources, and etching processes using hydrogen and hydrogen plasma. During processes that involve hydrogen, the hydrogen diffuses through the top electrode and the side of the capacitor to the thin film of metal-oxide capacitor dielectric (e.g., ferroelectric layered superlattice material) and reduces the oxides contained in the dielectric material. The absorbed hydrogen also metallizes the surface of the dielectric thin film by reducing metal oxides. The adhesivity of the dielectric thin film to the upper electrode is lowered by the chemical change taking place at the interface. Alternatively, the upper electrode is pushed up by the oxygen gas, water, and other products of the oxidation-reduction reactions taking place. As a result of these effects, the electronic properties of the capacitor are degraded, and peeling is likely to take place at the interface between the top electrode and the dielectric thin film. In addition, hydrogen also can reach the lower electrode, leading to internal stresses that cause the capacitor to peel off its substrate. These problems are acute in ferroelectric memories containing layered superlattice material compounds because these metal oxide compounds are particularly complex and prone to degradation by hydrogen-reduction. After a forming-gas anneal (FGA), the remanent polarization of the ferroelectrics typically is very low and no longer suitable for storing information. Also, an increase in leakage currents results.
Several methods have been reported in the art to inhibit or reverse, hydrogen degradation of desired electronic properties in ferroelectric oxide materials. Oxygen annealing at high temperature (800° C.) for about one hour results in virtually complete recovery of the ferroelectric properties degraded by hydrogen treatments. However, the high-temperature oxygen anneal itself may generate defects in silicon c

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