Static information storage and retrieval – Interconnection arrangements
Reexamination Certificate
2006-06-13
2006-06-13
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Interconnection arrangements
C365S051000, C257S693000, C257S692000, C257S738000, C257S777000
Reexamination Certificate
active
07061785
ABSTRACT:
A semiconductor device uses a package substrate on which bonding leads are formed respectively corresponding to bonding pads for address and data which are distributed to opposing first and second sides of a memory chip and address terminals and data terminals which are connected to the bonding leads. The semiconductor device further includes an address output circuit and a data input/output circuit which also serves for memory access and a signal processing circuit having a data processing function. A semiconductor chip having bonding pads connected to the bonding leads corresponding to the address terminals of the package substrate and bonding pads connected to the bonding leads corresponding to the data terminals of the package substrate and distributed to two sides out of four sides and the above-mentioned memory chip are mounted on the package substrate in a stacked structure.
REFERENCES:
patent: 4442507 (1984-04-01), Roesner
patent: 2002-043531 (2002-02-01), None
Hashizume Takanori
Ichitani Masahiro
Kudo Ikuo
Miwa Takashi
Morino Naozumi
Miles & Stockbridge PC
Renesas Technology Corp.
Tran Andrew Q.
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