Stacked integrated circuit package-in-package system with...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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Details

C257S685000, C257S777000, C257SE25006, C257SE25013, C257SE25018, C257SE25021, C257SE25027, C257SE23085, C257SE21614

Reexamination Certificate

active

11307722

ABSTRACT:
A stacked integrated circuit package-in-package system is provided forming a first integrated circuit spacer package including a mold compound with a recess provided therein, stacking the first integrated circuit spacer package on an integrated circuit die on a substrate with the recess positioned therebetween, and attaching a first electrical interconnect extending from the recess and connected between the integrated circuit die and the substrate.

REFERENCES:
patent: 6020629 (2000-02-01), Farnworth et al.
patent: 6972481 (2005-12-01), Karnezos
patent: 2005/0269682 (2005-12-01), Onodera et al.
patent: 2005/0269692 (2005-12-01), Kwon et al.
patent: 2005/0277228 (2005-12-01), Lee
patent: 2006/0249851 (2006-11-01), Karnezos

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