Electrical computers and digital data processing systems: input/ – Intrasystem connection
Reexamination Certificate
1998-06-11
2002-11-05
Follansbee, John A. (Department: 2156)
Electrical computers and digital data processing systems: input/
Intrasystem connection
C361S790000
Reexamination Certificate
active
06477593
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The present invention relates to data communications systems and methods, and more particularly, to input/output (I/O) bridge systems and methods.
STATEMENT OF THE PROBLEM
High-bandwidth busses are typically used to communicate between hosts and peripherals in applications such as computer networks. The bus interfaces used by hosts and peripherals often take different forms depending on the performance characteristics desired. For example, host devices may communicate via a Fibre Channel (FC) interface, while a peripheral such as a disk array may utilize a differential or single-ended Small Computer System Interface (SCSI) or other bus interface. When hosts and peripherals use disparate bus architectures, IO bridges are often utilized to provide connectivity.
I/O (or bus) bridges may also be used to increase the capacity of bus systems. Bus specifications often limit, among other things, the length of the bus and the number of devices that may be attached to the bus in order to maintain performance. For example, the Peripheral Component Interconnect (PCI) bus specification commonly employed in personal computer bus applications has detailed rules for round trip propagation delay and capacitive loading which help maintain the integrity of communications at specified bus clock rates. In order to increase the capacity of such a bus, an expanded multi-layer bus structure may be used that includes a plurality of busses connected by high-speed I/O bridges. This multi-layer structure can allow an increased number of devices to be interconnected while maintaining bus performance.
Although computer systems and networks may be expanded by the addition of I/O bridges, it may be problematic to provide for such expansion. Networks typically evolve over time, the number and types of devices connected in the network changing as users, services and functions are added to or removed from the network. This network evolution may affect the I/O bridges used in the network. Replacement or reconfiguration of devices in a network may require replacement of fixed I/O bridges connected to these devices. The replacement of I/O bridges may represent a significant cost, especially in a network having a frequently changing configuration.
SUMMARY OF THE INVENTION
In light of the foregoing, it is an object of the present invention to provide I/O bridge systems that may be reconfigured without requiring replacement of an entire bridge assembly.
This and other objects, features and advantages are provided according to the present invention by stacked circuit assemblies including a motherboard having first and second busses connected by a I/O bridge circuit, and a plurality of interface daughterboards stacked on the motherboard, a respective daughterboard being connected to one of the first and second busses depending on the position of the daughterboard in the stack. Crossed bus connections are provided through each of the daughterboards such that a bus interface circuit, e.g., an VO bridge circuit, of a daughterboard is connected to one motherboard bus while the other motherboard bus is conveyed through for connection to an a bus interface circuit on an adjacent daughterboard.
A stacked motherboard/daughterboard structure provided according to the present provides a modular I/O bridge architecture that can be easily reconfigured. To change the I/O bridge configuration, a daughterboard supporting a first configuration can simply be replaced by a daughterboard supporting a second configuration. The order of the daughterboards can be changed to change the arrangement of interfaces on the motherboard busses. In this manner, network reconfiguration can be achieved without requiring replacement of an entire assembly.
In particular, according to the present invention, a stacked circuit board assembly comprises a motherboard including a first bus and a second bus. A first connector is disposed on a side of the motherboard and has the first bus provided thereat. A second connector is disposed on the side of the motherboard, positioned laterally adjacent the first connector, and has the second bus provided thereat. An interconnected stack of daughterboards is disposed on the motherboard and connected to the first connector and the second connector of the motherboard. A daughterboard of the interconnected stack includes a bus interface circuit connected to one of the first bus or the second bus depending on the position of the daughterboard in the interconnected stack.
In an embodiment of the present invention, a respective one of a first daughterboard and a second daughterboard has a first side and an opposing second side and includes a first connector disposed on the first side. A second connector is disposed on the first side and positioned laterally adjacent the first connector. A third connector is coupled to the second connector, disposed on the second side and positioned opposite the first connector. A fourth connector is coupled to the first connector, disposed on the second side and positioned opposite the second connector and laterally adjacent the third connector. A bus interface circuit is coupled to the first and fourth connectors. The first connector and the second connector of the first daughterboard are mated with the third connector and the fourth connector, respectively, of the second daugterboard. The third connector and the fourth connector of the first daughterboard may be mated with the first connector and the second connector, respectively, of the motherboard.
In another embodiment of the present invention, an I/O bridge system comprises a motherboard including first and second busses, e.g., first and second PCI busses. An I/O bridge circuit is connected between the first and second busses and operative to communicate therebetween. A first connector is disposed on a side of the motherboard and has the first bus provided thereat. A second connector is disposed on the side of the motherboard, positioned laterally adjacent the first connector and has the second bus provided thereat. An interconnected stack of daughterboards is disposed on the motherboard and connected to the first and second connectors of the motherboard. A daughterboard of the interconnected stack includes an I/O bridge circuit connected to one of the first bus or the second bus depending on the position of the daughterboard in the interconnected stack. The I/O bridge circuit is operative to communicate between one of the motherboard busses and a communications channel such as a Fibre Channel.
In yet another embodiment according to the present invention, a stackable bus interface daughterboard comprises a substrate having a first side and an opposing second side. A first connector is disposed on the first side of the substrate. A second connector is disposed on the first side of the substrate and positioned laterally adjacent the first connector. A third connector is disposed on the second side of the substrate, positioned opposite the first connector and coupled to the second connector. A fourth connector is disposed on the second side of the substrate, positioned opposite the second connector and laterally adjacent the third connector and coupled to the first connector. A bus interface circuit is attached to the substrate, coupled to the first and fourth connectors and operative to communicate on a bus connected to the daughterboard via the first connector or the fourth connector. The first and second connectors may be configured to mate with third and fourth connectors, respectively, of a similar daughterboard positioned on the first side of the circuit substrate. The third and fourth connectors may be configured to mate with first and second connectors, respectively, of a similar daughterboard positioned on the second side of the circuit substrate. The bus interface circuit may comprise an I/O bridge circuit. Flexibly configurable
110
bridge assemblies may thereby be provided.
REFERENCES:
patent: 5201038 (1993-04-01), Fielder
patent: 5462442 (1995-10-01), Umemura et al.
pa
Khosrowpour Farzad
Pecone Victor Key
Adaptec, Inc.
Follansbee John A.
Patton & Boggs LLP
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