Stacked flip chip package

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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Details

C257S777000, C257S778000, C257S796000

Reexamination Certificate

active

06921968

ABSTRACT:
A stacked flip-chip package comprises a substrate having an opening, a back-to-face chip module, and an encapsulant. The back-to-face chip module is attached to the substrate and encapsulated by the encapsulant. The back-to-face chip module includes a first chip and a second chip. The first chip has a first active surface and a first back surface. Redistributed traces are formed on the first back surface. The second chip is flip-chip mounted on the first back surface of the first chip and electrically connected to the redistributed traces. A plurality of bumps connect the redistributed traces to the top surface of the substrate. Thus the second chip can be accommodated inside the opening and the redistributed traces are electrically connected to the second chip and the substrate so as to achieve fine pitch flip-chip mounting and improve the electrical performance and heat dissipation efficiency for the back-to-face chip module.

REFERENCES:
patent: 5776512 (1998-07-01), Weber
patent: 5817530 (1998-10-01), Ball
patent: 5886412 (1999-03-01), Fogal et al.
patent: 5973406 (1999-10-01), Harada et al.
patent: 6005778 (1999-12-01), Spielberger et al.
patent: 6051886 (2000-04-01), Fogal et al.
patent: 6057598 (2000-05-01), Payne et al.
patent: 6080264 (2000-06-01), Ball
patent: 6686223 (2004-02-01), Uchida
patent: 6737750 (2004-05-01), Hoffman et al.
patent: 6759737 (2004-07-01), Seo et al.
patent: 6798049 (2004-09-01), Shin et al.
patent: TW461058 (2001-10-01), None
patent: TW465803 (2001-11-01), None

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