Stacked die package system

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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Details

C257S685000, C257SE23085, C257SE25006, C257SE25013, C438S014000, C438S015000, C438S109000

Reexamination Certificate

active

11164160

ABSTRACT:
A stacked die package system including forming a bottom package including a bottom substrate and a bottom die mounted and electrically connected under the bottom substrate and forming a top package including a top substrate and a top die mounted and electrically connected over the top substrate. Mounting the top package by the top substrate over the bottom substrate and electrically connecting the bottom and top substrates. Mounting system electrical connectors under the bottom substrate adjacent the bottom die.

REFERENCES:
patent: 4859632 (1989-08-01), Lumbard
patent: 6835598 (2004-12-01), Baek et al.
patent: 6906416 (2005-06-01), Karnezos
patent: 6933598 (2005-08-01), Karnezos
patent: 2003/0183930 (2003-10-01), Fukasawa
patent: 2004/0065963 (2004-04-01), Karnezos

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