Stacked die module and techniques for forming a stacked die...

Details Stacked die module and techniques for forming a stacked die... Stacked die module and techniques for forming a stacked die...

2002-05-08

2004-01-27

Thompson, Craig A. (Department: 2813)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Including adhesive bonding step

C361S735000

Reexamination Certificate

active

06682955

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to semiconductor processing and, more particularly, to a stacked die module and techniques for forming a stacked die module.
2. Description of the Related Art
This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present invention, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present invention. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
Packaging of electrical circuits is a key element in the technological development of systems implementing electrical components. Various techniques have been developed to meet the continued demands for improving system performance and capability. Engineers have been challenged with finding ways to increase hardware capabilities while the space in which to provide these hardware capabilities continues to decrease.
One technique for saving valuable system board geography is to implement die stacking techniques. A standard integrated circuit package, such as a memory or processor package, may include a substrate whereon chips or die may be stacked. Die stacks are generally formed directly on a substrate. A first die may be adhesively and/or electrically coupled to the substrate. A second die may then be stacked on top of the first die and adhesively and/or electrically coupled to the first die. In addition or alternatively, the second die may be electrically coupled directly to the substrate by bondwires or leads, for example, or electrically coupled to the substrate through the first die. A third die may then be attached to the second die, and so forth.
While current stacking techniques provide more hardware capability in smaller areas by eliminating the need to populate additional substrate surface area for each individual die used in the system, the present techniques have several disadvantages. One problem is that the die are becoming extremely thin (1-6 mil). While thinner die have some advantages, the thinner die are more difficult to handle with the current die stacking tools. Stacking a die onto a substrate and then stacking a number of die one on top of the other, often involves numerous iterations using various tools and instruments which creates a number of handling iterations which may result in damage to one or more of the die in the stack. Further, the substrates on which the die are stacked generally have a different coefficients of thermal expansion. Thus, once the stack is formed on the substrate and cured, as in typical die stacking systems, a mismatch in the coefficients of thermal expansion (CTEs) may be introduced, which may cause cracking or other problems with the die stack since the interface between each of the die and the interface between the die and substrate are being cured at the same time but have different CTEs. Further, the processing difficulties may result in the wasting of previously good substrates since the die may be damaged in the die stacking process but this damage may not be realized until the entire package is assembled and electrically tested, as is the case in typical systems.
The present invention may address one or more of the problems set forth above.


REFERENCES:
patent: 6064120 (2000-05-01), Cobbley et al.
patent: 6184064 (2001-02-01), Jiang et al.
patent: 6285081 (2001-09-01), Jackson
patent: 6329220 (2001-12-01), Bolken et al.
patent: 6331221 (2001-12-01), Cobbley
patent: 6343019 (2002-01-01), Jiang et al.
patent: 6353268 (2002-03-01), Cobbley et al.
patent: 6387728 (2002-05-01), Pai et al.
patent: 6503776 (2003-01-01), Pai et al.
patent: 6586825 (2003-07-01), Rajagopalan et al.

Affiliated with

Also associated with

Rating

Stacked die module and techniques for forming a stacked die... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Stacked die module and techniques for forming a stacked die..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Stacked die module and techniques for forming a stacked die... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3216603