Stacked capacitor with sidewall insulation

Details Stacked capacitor with sidewall insulation Stacked capacitor with sidewall insulation

1991-04-05

1992-11-10

Wojciechowicz, Edward J.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257902, H01L 2702

Patent

active

051628902

ABSTRACT:
In a multi-layered integrated memory circuit, a method for using sacrificial layers and insulating "sticks" is disclosed to provide a contact between two layers, where the contact does not short to an intervening layer. This invention provides this with minimal extra processing by using sacrificial layers with appropriate etch and etch stop properties. As these layers are etched, additional layers which alternate in the same conducting/insulating pattern are exposed. Each etch stops on either a conductive or insulative layer. A contact layer may then be deposited which connects the uppermost capacitor plate to the pass transistor of the memory cell.

REFERENCES:
patent: 4570331 (1986-02-01), Eaton et al.
patent: 4685197 (1987-03-01), Tigelaar et al.
patent: 4686000 (1987-09-01), Heath
patent: 4700457 (1987-11-01), Matsukawa
patent: 4721987 (1988-01-01), Baglee
patent: 4864464 (1989-09-01), Gonzalez
patent: 4899203 (1990-04-01), Ino
N. Vogl, Jr., "Making A One-Device Memory Cell", IBM Technical Disclosure Bulletin, vol. 18, No. 12, 3953-3954 (May, 1976).

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