Stacked-capacitor for a DRAM cell

Details Stacked-capacitor for a DRAM cell Stacked-capacitor for a DRAM cell

1990-08-31

1992-03-10

James, Andrew J.

357 51, 357 59, H01L 2968, H01L 2978, H01L 2992

Patent

active

050953460

ABSTRACT:
There is disclosed a stacked capacitor with high capacity which ensures structural stability in a DRAM cell and a method for manufacturing the same. The stacked-capacitor is of a hollow (or cylindrical) capacitor where both ends of several polysilicon layers which form a storage electrode are connected with each other. In construction, this inventive stacked-capacitor includes: a first polysilicon layer coupled to the source region so as to extend in parallel with surface of the substrate over the left and right sides of the source region; a bridge polysilicon layer, extending in the upward direction of the substrate from both ends of the first polysilicon layer; a dielectric film formed so as to contact with the surfaces of the bridge polysilicon layer, first polysilicon layer, second polysilicon layer; and a third polysilicon layer formed so as to contact with the surface of the dielectric film.

REFERENCES:
patent: 4673969 (1987-06-01), Ariizumi et al.
patent: 4700457 (1987-10-01), Matsukawa
patent: 4864464 (1989-09-01), Gonzalez
patent: 4899203 (1990-02-01), Ino
patent: 4926223 (1990-05-01), Bergemont
patent: 5005103 (1991-04-01), Kwon et al.
patent: 5006481 (1991-04-01), Chan et al.

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