Stack semiconductor package including an interposer chip...

Details Stack semiconductor package including an interposer chip... Stack semiconductor package including an interposer chip...

2011-04-19

2011-04-19

Pham, Thanh V (Department: 2894)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

C257S068000, C257S104000, C257S196000, C257S690000, C257S691000, C257S700000, C257SE23001, C257SE25001

Reexamination Certificate

active

07928555

ABSTRACT:
A stacked semiconductor package may include a wiring substrate. A first semiconductor chip may be disposed on the wiring substrate and wire-bonded to the wiring substrate. An interposer chip may be disposed on the wiring substrate and sire bonded to the wiring substrate. The interposer chip may include a circuit element and a bonding pad being electrically connected. A second semiconductor chip may be disposed on the interposer chip and wire-bonded to the interposer chip. The second semiconductor chip may be electrically connected to the wiring substrate through the interposer chip.

REFERENCES:
patent: 6285084 (2001-09-01), Hikita et al.
patent: 6339234 (2002-01-01), Takizawa
patent: 7098528 (2006-08-01), Vasishta et al.
patent: 2002/0085334 (2002-07-01), Figueroa et al.
patent: 2003/0153122 (2003-08-01), Brooks
patent: 1020030048250 (2003-06-01), None
patent: 1020050074145 (2005-07-01), None
Taiwanese Office Action dated Aug. 5, 2010.

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