Boots – shoes – and leggings
Patent
1989-04-03
1992-04-21
Lee, Thomas C.
Boots, shoes, and leggings
364239, 3642396, 3642443, 364247, 3642477, 3642545, 364251, 3642513, 364933, 3649336, 364955, 3649576, 364965, 3649654, 364DIG1, 364DIG2, G06F 906
Patent
active
051074575
ABSTRACT:
An efficient hardware cache manager controls the top-of-stack data underflow/overflow. A processor chip includes a processor, a stack buffer and the invented cache management hardware. The processor chip communicates with a remove overflow stack through an address/data bus. The cache management hardware efficiently manages overflow and underflow to and from the processor chip in such a manner less than 1% of the processor's time is spent managing the stack cache.
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Hayes John R.
Lee Susan C.
Archibald Robert E.
Califano Howard W.
Lee Thomas C.
Lim Krisna
Pawlikowski Eugene J.
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