Stable electroless fine pitch interconnect plating

Details Stable electroless fine pitch interconnect plating Stable electroless fine pitch interconnect plating

2006-05-30

2006-05-30

Novacek, Christy (Department: 2822)

Semiconductor device manufacturing: process

With measuring or testing

Electrical characteristic sensed

C438S612000, C438S678000, C257S048000, C257S741000, C257S766000

Reexamination Certificate

active

07052922

ABSTRACT:
A method and apparatus for plating facilitates the plating of a small contact feature of a wafer die while providing a relatively stable plating bath. The method utilizes a supplemental plating structure that is larger than a die contact that is to be plated. The supplemental plating structure may be located on the wafer, and is conductively connected to the die contact. Conductive connection between the die contact and the supplemental plating structure facilitates the plating of the die contact. The supplemental plating structure also can be used to probe test the die prior to singulation.

REFERENCES:
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patent: 6362089 (2002-03-01), Molla et al.
patent: 6709980 (2004-03-01), Gleason
patent: 6764879 (2004-07-01), Nagao et al.
patent: 6774039 (2004-08-01), Drewery
patent: 6841476 (2005-01-01), Nakamura
patent: 6953951 (2005-10-01), Yamazaki et al.

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