SRTS clock recovery system for use in a highly stressed network

Details SRTS clock recovery system for use in a highly stressed network SRTS clock recovery system for use in a highly stressed network

1995-12-15

1998-04-21

Chin, Wellington

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

375356, 375226, 370516, 370508, H03D 324

Patent

active

057426490

ABSTRACT:
An improved SRTS clock recovery system of a network node that adjusts the range of a received source RTS sample and a locally generated destination RTS sample to compensate for inherent characteristics of a network system. In addition, the improved system extends the range of the RTS samples to properly interpret large phase differences between a source node clock and transmit clock generated by the network node. This novel technique for interpreting source and destination RTS samples enables the improved network node to accurately recover a source clock frequency from a network transmission in a highly stressed network system. Specifically, the SRTS clock recovery system includes an RTS sample interpreter having a slope determinator for determining the expected average change in source and destination RTS samples over time. A slope compensator of the interpreter scales the range of RTS sample slopes to compensate for this expected average change in samples, thereby increasing the range of usable RTS sample slope values, while a range extender increases the number of phase values that the RTS sample slopes represent to accommodate large phase differences between the source and destination clock frequencies.

REFERENCES:
patent: 4961188 (1990-10-01), Lau
patent: 5260978 (1993-11-01), Fleischer et al.

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