Static information storage and retrieval – Systems using particular element – Flip-flop
Patent
1999-01-04
2000-03-21
Nelms, David
Static information storage and retrieval
Systems using particular element
Flip-flop
365156, 365190, G11C 1100
Patent
active
060409916
ABSTRACT:
A Static RAM cell having a reduced surface area. The Static RAM cell includes a pair of P channel transistors and a pair of N channel transistors connected as a bistable latch. A first common source connection of the latch is connected to a Write Bit terminal and the remaining source connections of the latch are connected to complementary bit lines. A word line addressing the latch is provided through the transistors connected to the Bit Lines having shared body contact which permits reading and writing to the latch. During a write mode, the word line is connected to a potential which renders transistors connected to the complementary bit lines conductive, while the write bit connected to a potential which renders the remaining transistors nonconducting. During a read operation, one of the remaining transistors are rendered conductive, and the word line renders the set of transistors connected to the Bit Lines conductive so that the bit Lines are charged from the respective nodes of the latch.
REFERENCES:
patent: 3969708 (1976-07-01), Sonoda
patent: 4023149 (1977-05-01), Bormann et al.
patent: 4740714 (1988-04-01), Masaki et al.
patent: 4858182 (1989-08-01), Pang et al.
patent: 5020028 (1991-05-01), Wanlass
patent: 5475633 (1995-12-01), Mehalel
patent: 5475638 (1995-12-01), Anami et al.
patent: 5535155 (1996-07-01), Abe
patent: 5550771 (1996-08-01), Hatori
patent: 5570312 (1996-10-01), Fu
patent: 5631863 (1997-05-01), Fechner et al.
patent: 5668770 (1997-09-01), Itoh et al.
Yoshida, T., et al., "Crystallization Technology for Low Voltage Operated TFT," 844-IEDM 91, pp. 32.6.1-32.6.4 IEEE (1991).
Kuriyama, H., et al., "A C-Switch Cell for Low-Voltage Operation and High-Density SRAMs," IEDM 96-279, pp. 11.3.1-11.3.4, IEEE (1996).
Ellis-Monaghan John J.
Pricer Wilbur D.
International Business Machines - Corporation
Nelms David
Nguyen Tuan T.
Shkurko Eugene I.
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