Active solid-state devices (e.g. – transistors – solid-state diode – Fet configuration adapted for use as static memory cell
Patent
1995-06-02
1998-11-10
Whitehead, Carl W.
Active solid-state devices (e.g., transistors, solid-state diode
Fet configuration adapted for use as static memory cell
257 69, 257206, 257208, 257211, 257390, 257393, H01L 2911
Patent
active
058348514
ABSTRACT:
Herein disclosed is a semiconductor integrated circuit device comprising a SRAM having its memory cell composed of transfer MISFETs to be controlled through word lines and drive MISFETs. The gate electrodes of the drive MISFETs and the gate electrodes of the transfer MISFETs of the memory cell, and the word lines are individually formed of different conductive layers. The drive MISFETs and the transfer MISFETs are individually arranged to cross each other in the gate length direction. The word lines are extended in the gate length direction of the gate electrodes of the drive MISFETs and caused to cross the gate electrodes of the drive MISFETs partially.
The two transfer MISFETs of the memory cell have their individual gate electrodes connected with two respective word lines spaced from each other and extended in an identical direction. The region defined by the two word lines is arranged therein with the two drive MISFETs and the source lines.
The source line is formed of a conductive layer identical to that of the word line. The individual data lines of the complementary data line are formed of an identical conductive layer which is different from that of the word line and the source line. The identical conductive layer between the word line and source line and the complementary data line is formed with two word lines: a main word line extended in the first direction identical to that of the word line and source line and used by adopting the divided word line system: and a sub-word line used by adopting the double word line system.
REFERENCES:
patent: 5194749 (1993-03-01), Meguro et al.
Hashiba Soichiro
Hashimoto Naotaka
Hiraishi Atsushi
Ikeda Shuji
Ishibashi Koichiro
Hitachi , Ltd.
Tang Alice W.
Whitehead Carl W.
LandOfFree
SRAM having load transistor formed above driver transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with SRAM having load transistor formed above driver transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and SRAM having load transistor formed above driver transistor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1519432