SRAM having improved cell stability and method therefor

Static information storage and retrieval – Systems using particular element – Flip-flop

Reexamination Certificate

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C365S205000

Reexamination Certificate

active

11033934

ABSTRACT:
A SRAM (14) includes a SRAM cell (26), the cell (26) includes a first storage node (N1), a second storage node (N2), and a cross coupled latch (40) including a first primary source current path to the first storage node, a first primary sink current path to the first storage node, a second primary source current path to the second storage node, a second primary sink current path to the second storage node, a fifth primary current path to the first storage node, and a sixth primary current path to the second storage node. During standby and/or a read operation of the SRAM cell (26), one of the fifth primary current path and the sixth primary current path is conductive. During a write operation, the fifth primary current path and the sixth primary current path are non-conductive.

REFERENCES:
patent: 5710742 (1998-01-01), Carter
patent: 5828597 (1998-10-01), Madan
patent: 6363011 (2002-03-01), Hirose et al.
patent: 6510076 (2003-01-01), Lapadat et al.
patent: 2004/0214389 (2004-10-01), Madurawe
patent: 2004/0238892 (2004-12-01), Jung et al.
patent: 2005/0029556 (2005-02-01), Wang et al.

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