SRAM device

Details SRAM device SRAM device

2007-12-06

2011-12-13

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Systems using particular element

Semiconductive

C365S156000, C365S154000

Reexamination Certificate

active

08077510

ABSTRACT:
An SRAM device including a memory cell, the memory cell having two access transistors connected to a word line, and a flip-flop circuit having complementary transistors, the transistor being a field effect transistor having a standing semiconductor thin plate, a logic signal input gate and a bias voltage input gate, the gates sandwiching the semiconductor thin plate and being electrically separated from each other, a first bias voltage is applied to bias voltage input gates of the transistors of the memory cells in a row including a memory cell being accessed for reading or writing, and a second bias voltage is applied to the bias voltage input gates of the transistors of the memory cells in a row including a memory cell under memory holding operation.

REFERENCES:
patent: 5600588 (1997-02-01), Kawashima
patent: 7286319 (2007-10-01), Kida et al.
patent: 7639525 (2009-12-01), Yamaoka et al.
patent: 2006/0274569 (2006-12-01), Joshi et al.
patent: 2008/0186752 (2008-08-01), Kim
patent: 7 211079 (1995-08-01), None
patent: 2006 295653 (2006-10-01), None

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