Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output access regulation
Reexamination Certificate
2007-12-04
2007-12-04
Peikari, B. James (Department: 2189)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output access regulation
C710S040000, C712S225000
Reexamination Certificate
active
10776702
ABSTRACT:
A controller for a random access memory includes an address and command queue that holds memory references from a plurality of microcontrol functional units. The address and command queue includes a read queue that stores read memory references. The controller also includes a first read/write queue that holds memory references from a core processor and control logic including an arbiter that detects the fullness of each of the queues and a status of completion of outstanding memory references to select a memory reference from one of the queues.
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Adiletta Matthew J.
Cutter Daniel
Redfield James
Wheeler William
Wolrich Gilbert
Fish & Richardson P.C.
Peikari B. James
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