SRAM-compatible memory device having three sense amplifiers...

Static information storage and retrieval – Read/write circuit – Flip-flop used for sensing

Reexamination Certificate

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C365S207000, C365S222000

Reexamination Certificate

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07002864

ABSTRACT:
The SRAM-compatible memory device includes a first pair of bit lines for transferring data fetched from/written in a DRAM cell in a first memory block, a second pair of bit lines for transferring data fetched from/written in a DRAM cell in a second memory block. Further, the SRAM compatible memory device includes the first sense amplifier for amplifying and latching data in the first pair of bit lines, a second sense amplifier for amplifying and latching data in the second pair of bit lines, a third sense amplifier for amplifying and latching data transferred whereto, a first switching unit for controlling an electrical connection between the first pair of bit lines and the third sense amplifier, and a second switching unit for controlling an electrical connection between the second pair of bit lines and the third sense amplifier.

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patent: 6052323 (2000-04-01), Kawamura
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patent: 6442088 (2002-08-01), Tsuchida et al.
patent: 6556507 (2003-04-01), Toda et al.
patent: 2004/0228165 (2004-11-01), Kim et al.

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