SRAM cell using tunnel current loading devices

Static information storage and retrieval – Systems using particular element – Flip-flop

Reexamination Certificate

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C365S161000, C365S226000

Reexamination Certificate

active

10906056

ABSTRACT:
An SRAM cell with gate tunneling load devices. The SRAM cell uses PFET wordline transistors and NFET cross-coupled transistors. The PFET wordline transistors are fully conductive during read operations, thus a full voltage level is passed through the PFET to the high node of the cell from the bitline. Tunnel current load devices maintain the high node of the cell at full voltage level during standby state.

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