SRAM cell and method of manufacturing the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reexamination Certificate

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Details

C438S154000, C438S622000

Reexamination Certificate

active

06902963

ABSTRACT:
Disclosed is a SRAM cell and a method of manufacturing the same. The SRAM cell comprises: a pair of access devices; a pair of pull-up devices; a pair of pull-down devices; and at least one metal plate formed on metal interconnection lines in contact with a substrate, having a dielectric film interposed between the metal plate and the metal interconnection lines, so as to increase a cell capacitance, thereby reducing a soft error rate. Herein, one metal plate may be included in each cell. In this case, the metal plate overlaps with a first one of metal interconnection lines of a node side and a node bar side, while being in contact with a second one of the metal interconnection lines of the node side and the node bar side. Also, two metal plates may be included in each cell. In this case, the metal plates overlap, respectively, with one metal interconnection line of metal interconnection lines of a node side and a node bar side, while being in contact with another metal interconnection line of the node side or the node bar side, respectively. Therefore, capacitance is additionally formed to increase cell capacitance, so that variation of the electric potentials of cell nodes, which is caused by generated electrons, is prevented, and thereby soft error can be efficiently reduced.

REFERENCES:
patent: 5422296 (1995-06-01), Lage
patent: 5489790 (1996-02-01), Lage
patent: 5798551 (1998-08-01), Kikushima et al.
patent: 6030865 (2000-02-01), Hashimoto et al.
patent: 6171892 (2001-01-01), Kikushima et al.
patent: 6303958 (2001-10-01), Kanaya et al.
patent: 6372554 (2002-04-01), Kawakita et al.
patent: 6838772 (2005-01-01), Saitoh et al.

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