SRAM based cell for programmable logic devices

Static information storage and retrieval – Read/write circuit – Including specified plural element logic arrangement

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307465, 34082583, G11C 1300

Patent

active

051445824

ABSTRACT:
A programmable cell for use in programmable logic devices utilizes CMOS SRAM technology. True and complement cells are paired, and generate a signal which can be combined with other such signals to give a product term. SRAM bits store program information, and drive the generated signal as a function of values at its true and complementary inputs. The generated signal goes through a full CMOS voltage swing, so that no sense amplifiers are required for the product term.

REFERENCES:
patent: 4710898 (1987-12-01), Sumi
patent: 4789951 (1988-12-01), Birkner et al.
patent: 4796229 (1989-01-01), Greer, Jr. et al.

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