SRAM and dual single ended bit sense for an SRAM

Static information storage and retrieval – Read/write circuit – For complementary information

Reexamination Certificate

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C365S208000, C327S051000

Reexamination Certificate

active

11055416

ABSTRACT:
A CMOS static random access memory (SRAM) and a bit select for the SRAM. The bit select includes a dual single-ended sense receiving a difference signal on a bit line pair and selectively sensing signals developing on each bit line independently of the other. Single ended outputs from the dual-ended sense are provided to an output driver. The output driver provides a pair of selectively-complementary output signals.

REFERENCES:
patent: 5850359 (1998-12-01), Liu
patent: 6608786 (2003-08-01), Somasekhar et al.
patent: 6801463 (2004-10-01), Khellah et al.
patent: 2005/0128844 (2005-06-01), Yamagami

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