Electronic digital logic circuitry – Interface – Supply voltage level shifting
Reexamination Certificate
2009-12-10
2010-12-14
Tran, Anh Q (Department: 2819)
Electronic digital logic circuitry
Interface
Supply voltage level shifting
C326S068000, C326S080000
Reexamination Certificate
active
07852119
ABSTRACT:
A cross-coupled inverter includes a first inverter and a second inverter cross-coupled such that the input terminal of each inverter is connected to the output terminal of the other inverter. A set signal is input to the gate of a first set transistor, and an inverted set signal is input to the gate of a fourth set transistor. A reset signal R is input to the gate of a first reset transistor of a reset unit, and an inverted reset signal is input to the gate of a fourth reset transistor thereof. The gate of the second set transistor and the gate of the third reset transistor are connected to the output terminal of the second inverter. The gate of the third set transistor and the gate of the second reset transistor are connected to the output terminal of the first inverter.
REFERENCES:
patent: 5825205 (1998-10-01), Ohtsuka
patent: 6043699 (2000-03-01), Shimizu
patent: 6515532 (2003-02-01), Jinzai
patent: 6600357 (2003-07-01), Kirihara
Advantest Corporation
Ladas & Parry LLP
Tran Anh Q
LandOfFree
SR-flip flop with level shift function does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with SR-flip flop with level shift function, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and SR-flip flop with level shift function will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4177691