Spread spectrum communication system having a minimized bit erro

Details Spread spectrum communication system having a minimized bit erro Spread spectrum communication system having a minimized bit erro

1994-12-21

1997-03-11

Chin, Stephen

Pulse or digital communications

Repeaters

Testing

375346, 375285, H04L 2730, H04B 1500, H04K 100

Patent

active

056109385

ABSTRACT:
A clock rate modulation spread spectrum (CRM-SS) communication system is provided in which a bit error rate on a receiver side is minimized by controlling at least one of parameters defining a phase error. The CRM-SS communication system uses a delay locked loop comprising an n.DELTA.-type delay locked loop, where 0<n.ltoreq.2. A sum of a plurality of phase errors generated by different causes are calculated. A receiver and/or transmitter is controlled by varying one of parameters including a loop gain K and a linear region n.DELTA. of the phase comparison characteristic of the delay locked loop, a modulation index .beta., a transmission rate fm, a transmission power P and a chip width .DELTA., in accordance with the sum calculated by the calculating means so that a bit error rate in the receiver is minimized.

REFERENCES:
patent: 5128957 (1992-07-01), Nakagawa
patent: 5216691 (1993-06-01), Kaufmann
patent: 5280499 (1994-01-01), Suzuki et al.
patent: 5303258 (1994-04-01), Nakamura
"Method of using PLL-IC", published by Sangyo Shuppan, pp. 112-129.

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